Application Specific Instruction-set Processor Using a Parametrizable multi-SIMD Synthesizeable Model Supporting Design Space Exploration
In this thesis, we provide a synthesizable model for supporting design space exploration of application-specific instruction-set processors. The model is written in a high-level of abstraction hardware description language Bluespec System Verilog and is parametrized to support different configurations for use in the design space exploration. To test the model, different applications from the media