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In this paper, a performance benchmark for the assessment of two feedforward control architectures for the load disturbance compensation problem is proposed. In particular, two indices are devised so that the advantage of using a feedforward compensator with respect to the use of a feedback controller only is quantified. Furthermore, these metrics will help to make quantitative comparisons among d

This paper is intended to answer the question: “When is a simple dead-time compensator expected to perform better than a PID?”. The performance criterion used is the integrated absolute error (IAE). It is compared for PI and PID controllers and a simple dead-time compensator (DTC) when a step load disturbance is applied at the plant input. Both stable and integrating processes are considered. For

This paper describes tuning procedures for dead-time compensating controllers (DTC). Both stable and integrating processes are considered. Simple experiments are performed to obtain process models as well as bounds on the allowable bandwidth for stability. The DTC's used have few parameters with clear physical interpretation so that manual tuning is possible. Furthermore, it is shown how the DTC's

This paper treats the problem of control signal saturation caused by feedforward control from measurable load disturbances. An efficient feedforward compensator will often give significant peaks in the control signal at fast changes in the load disturbance. These peaks may cause the control signal to reach a saturation limit. In the paper, it is shown that the anti-windup function may cause unnece

Popular Abstract in Swedish Denna avhandling presenterar några reglertekniska tillämpningar i elkraftsystem. Tillämpningarna är: hur likströmskablar påverkar båtrafik som använder magnetkompasser; frekvensmätning i elkraftsystem; algorithmer för datorbaserade reläskydd; koppling av aktiv last för att dämpa effektpendlingar.

https://www.lth.se/utbildning/ansoekan-och-antagning/application-for-courses-at-lth-to-be-included-in-postgraduate-education/ - 2026-10-08

We document the socioeconomics of wind power expansion in Sweden using two metrics. First, we compute the difference in socioeconomic status (SES) between residents exposed to wind power (0-2 km from the closest turbine) and those not exposed. For each site, the metric is computed ten years prior until five years after construction. When the comparison group is other residents within the same muni

The Parallel Systems Division brings together three distinct research groups. The Mathematical Insights into Algorithms for Optimization (MIAO), Embedded Systems Design Laboratory and Lund University Graphics Group (LUGG).

This paper presents an analysis of the Ziegler-Nichols frequency response method for tuning PI controllers, showing that this method has severe limitations. The limitations can be overcome by a simple modification for processes where the time delay is not too short. By a major modification it is possible to obtain new tuning rules that also cover processes that are lag dominated.

Despite academic advances in PID controller design and development of automatic tuning procedures, there are still many PID controllers that are badly tuned, or not even tuned at all, in process industry. There are several reasons for this, but one major reason is that it is considered too time consuming to use current PID controller tuning methods. This paper presents a new tuning method that is

A recently published paper addressed the so called "PI+p" controller (i.e., a PI augmented with an additional, stable pole) and demonstrated that said controller yields interesting results particularly if tuned with the "contextual" approach, where model-based rules are used in conjunction with a relay experiment so as to provide at the same time the tuned regulator, and the tuning model. In this

Grain-128AEAD is a stream cipher supporting authenticated encryptionwith associated data, and it is currently in round 2 of the NIST lightweight cryptostandardization process. In this paper we present and benchmark software implementations of the cipher, targeting constrained processors. The processors chosen arethe 8-bit (AVR) and 16-bit (MSP) processors used in the FELICS-AEAD framework.Both hig