Stability and Worst-Case Performance Analysis of Sampled-Data Control Systems with Input and Output Jitter
When a feedback controller is implemented in a networked embedded system, the computations and communications induce delays and jitter, which may destabilize the control loop. The majority of previous work on analysis of control loops with time-varying delays has focused on output (actuation) jitter. In many embedded systems, input (sampling) jitter is also an issue. In this paper, we analyze the
